The present invention relates to a low pass filter formed of a switch capacitor integrator in use for electronic filters, voice recognition circuits and voice composing circuits.
FIGS. 1A and 1B show a basic circuit of a switched capacitor circuit and FIG. 2 shows its equivalent circuit. In these figures, a switch S is connected at the first stationary contact a to the input terminal 11, and at the second stationary contact b to the output terminal 12. A common contact c is connected through a capacitor Cs to ground. Potentials Vi and Vo with respect to ground potential are applied to the input and output terminals, respectively. As shown in FIG. 1A, when the switch S is turned to the contact a, the charge Q1 stored in the capacitor Cs is given by Q1=Cs.times.Vi. When it is turned to the contact b, as shown in FIG. 1B, the charge Q2 stored in the capacitor Cs is expressed by Q2=Cs.times.Vo. The switching operation of the switch S from the input terminal 11 to the output terminal 12 is equivalent to the movement of .DELTA.Q from the input terminal 11 to the output terminal 12. .DELTA.Q is EQU .DELTA.Q=Q1-Q2=Cs(Vi-Vo) (1)
When the switch S is switched f.sub.s times per second, an average current i flowing from the input terminal 11 to the output terminal 12 is given EQU i=.DELTA.Q.multidot.f.sub.s =Cs(Vi-Vo)f.sub.s ( 2)
If the switching frequency f.sub.s of the switch S is sufficiently larger than the frequencies of the voltages Vi and Vo, the current i is equal to the current determined by the instantaneous values of the voltages Vi and Vo. Accordingly, the circuit shown in FIGS. 1A and 1B is equivalent to a circuit with a resistor connected between the input and output terminals 11 and 12. Here, the resistor R is given ##EQU1##
As described above, in the switched capacitor circuit, the capacitor Cs connected at one end to the reference potential is switched at the other end between two different potential terminals. Equivalently, the resistor R is connected between the two potential terminals. The switched capacitor is the integrator formed by using the switched capacitor unit.
FIG. 3 shows a mirror integrator formed using the operational amplifier 31 and its input vs. output characteristic is mathematically expressed by the following equation ##EQU2## where Vi is an input voltage, Vo an output voltage and Rs a resistance of an input resistor between the input terminal 11 and the inverting input terminal (-) of the amplifier 31, Cf a capacitance of a feedback capacitor connected between the output terminal and the inverting input terminal (-) of the amplifier 31, and S is the Laplacian.
In FIG. 3, V.sub.DD and V.sub.SS are power sources, and the non-inverting input terminal (+) of the amplifier 31 is connected to ground.
FIG. 4 shows a mirror integrator formed using the switched capacitor circuit 41 in place of the resistor Rs in the circuit shown in FIG. 3. The input vs. output characteristic of the circuit 41 is such that the R in the equation (3) is substituted into the Rs in the equation (4), and is given ##EQU3## As seen from the equation (5), the input vs. output characteristic of the mirror integrator is a linear function of a capacitance ratio of the capacitances Cs and Cf, and the switching frequency f.sub.s of the switch S. This indicates that the integration time constant may be changed proportional to the frequency f.sub.s, and that the filter formed using the mirror integrator shown in FIG. 4 can switch the filtering frequency proportional to the switching frequency f.sub.s.
FIGS. 5A, 5B, 6A and 6B show mirror integrators equivalent to the mirror integrator shown in FIG. 4. In the mirror integrators shown in these figures, switched capacitor circuits 50 and 60 are each provided with two switches S1 and S2. Both ends of the capacitor Cs can simultaneously be switched by the switches S1 and S2. The first stationary contact a1 of the switch S1 is connected to the input terminal 11; the second stationary contact b1 to ground; the common contact to one end of the capacitor Cs. The first stationary contact a2 of the switch S2 is connected to the inverting input terminal (-) of the amplifier 31; the second stationary contact b2 to ground; the common contact to the other terminal of the capacitor Cs. Incidentally, in the mirror integrators, the switched capacitor circuit is used for the resistor with a positive resistance.
When the switches S1 and S2 are turned to the stationary contacts b1 and b2, respectively, as shown in FIG. 5A, the charge of the capacitor Cs is discharged to zero. As shown in FIG. 5B, when the switches S1 and S2 are connected to the stationary contacts a1 and a2, respectively, as shown in FIG. 5B, the charge Q given by the following equation is stored in the capacitor Cs. EQU Q=Cs(Vi-Vi') (6)
where Vi is a voltage applied to the terminal 11 and Vi' is a voltage applied to the inverting input terminal (-) of the amplifier 31.
The average current i of the capacitor Cs is given by EQU i=Cs(Vi-Vi')f.sub.s ( 7)
where f.sub.s is the switching frequency of the switches S1 and S2. Further, the equivalent resistance R between the stationary contacts a1 and a2 is ##EQU4## The equation (8) is the same as the equation (3). The switched capacitor circuit 50 shown in FIGS. 5A and 5B is equivalent to the switched capacitor circuit 41 shown in FIG. 4. In the mirror integrators shown in FIGS. 6A and 6B, the switched capacitor circuit is used as a resistor with a negative resistance.
As shown in FIG. 6A, when the switches S1 and S2 are turned to the first and second contacts a1 and b2, respectively, the charge Q given by the following equation is charged into the capacitor Cs. EQU Q=Cs.multidot.Vi (9)
When the switches S1 and S2 are turned to the second and first stationary contacts b1 and a2, respectively, as shown in FIG. 6B, the charge Q stored in the capacitor Cs and given by the equation (9) is supplied to the inverting input terminal (-) of the amplifier 31. Therefore, if the switching frequencies f.sub.s of the switches S1 and S2 is sufficiently larger than that of the voltages Vi and Vi', an equivalent resistance circuit given by R=1/(Cs.times.f.sub.s) is formed.
A low pass filter formed using the mirror integrator with the switched capacitor circuit is shown in FIG. 7. The input signal Vi supplied to the input terminal 71 is applied through the switched capacitor circuit 72 serving as a positive resistor to the inverting input terminal (-) of the first operational amplifier 31.sub.1. The amplifier 31.sub.1 is connected to the two power source voltages V.sub.DD and V.sub.SS, and its output terminal is connected to a switched capacitor circuit 73 at the next stage serving as a negative resistor, and through the first feedback capacitor Cf1 to the inverting input terminal (-). Ground potential as a reference potential is coupled with the non-inverting input terminal (+) of the amplifier 31.sub.1. The output signal Va of the amplifier 31.sub.1 is applied through the switched capacitor circuit 73 to the inverting input terminal (-) of the second operational amplifier 31.sub.2. Two power source voltages V.sub.DD and V.sub.SS are applied to the amplifier 31.sub.2. The output terminal of the amplifier 31.sub.2 is connected to the output terminal 75 of the device (low pass filter) and through the second feedback capacitor Cf2 to the inverting input terminal (-). Ground potential as the reference voltage is applied to the non-inverting input terminal (+) of the amplifier 31.sub.2. Further, the output terminal of the amplifier 31.sub.2 is connected to the inverting input terminal (-) of the amplifier 31.sub.1 through a switched capacitor circuit 74 serving as a positive resistor and a third capacitor Cs13 connected in parallel with the circuit 74. The output signal Vo of the amplifier 31.sub.2 is fed back to the inverting input terminal (-) of the amplifier 31.sub.1.
In operation, the output signal Va of the amplifier 31.sub.1 is given by ##EQU5## where f.sub.s is the number of switchings per second of the switched capacitors Cs11 and Cs12, and S is the Laplacian.
The output signal Vo of the amplifier 31.sub.2 has a positive value since the switched capacitor circuit 73 is used as a negative resistor, and is given by the following equation ##EQU6## Substituting the equation (10) into the equation (11), we have a transfer function H.sub.(s) between the input signal Vi and the output signal Vo as given by ##EQU7## The transfer function of the low pass filter is generally given ##EQU8## where G is a gain of the filter, w.sub.c is an angular velocity at -3 dB and 2.pi.f.sub.c.
When a low pass filter of the Butterworth is used for the low pass filter, "bo=1" and "b1=.sqroot.2". Further, when comparing the equations (12) and (13), we have ##EQU9##
From the equations (14), (15) and (16), the following equations (17) and (18) are obtained. ##EQU10##
Therefore, the low pass filter of the Butterworth type can be formed by making the integration constant of the first stage containing the switched capacitor circuits 72 and 74 and the amplifier 31 equal to that of the second stage containing the switched capacitor circuit 73 and the amplifier 31.sub.2, and by setting the capacitance of the capacitor Cs13 to a value .sqroot.2 times that of the capacitor Cf1.
As shown in FIGS. 4, 5A, 5B, 6A and 6B, the switched capacitor integrator used as the mirror integrator needs a single power source terminal connected to the reference power souree Vref (ground) in addition to the two power source terminals connected to the two power sources V.sub.DD and V.sub.SS. The low pass filter formed using such mirror integrator needs three power source terminals. When such low pass filter is fabricated together with the ordinary random logic of the type using two power sources V.sub.DD and V.sub.SS, a reference power source terminal must additionally be used in addition to the two power source terminals.
The increase of the power source terminals provides a great problem in fabricating the integrated circuits in that the circuit is complicated, the chip area increases, and the pattern design for the three power terminals is complicated. Further, the design of the printed circuit for mounting the integrated circuits is complicated, resulting in increase of the manufacturing cost.